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D E M O 9 S 1 2 X H Y 2 5 6
J U L Y
1 5 ,
2 0 1 0
U S E R G U I D E
Figure 4: VX_EN Option Header
ON
Enabled
OFF
Disabled
VX_EN
CAUTION:
Do not exceed available current from USB-BDM or on-board regulator
when sourcing power through connector J1 to external circuitry.
RESET SWITCH
The RESET switch (SW6) applies an asynchronous RESET to the MCU. The RESET switch
is connected directly to the RESET* input on the MCU. Pressing the RESET switch applies a
low voltage level to the RESET* input. A pull-up bias resistor allows normal MCU operation.
LOW VOLTAGE RESET
The MC9S12XHY256 utilizes an internal Low Voltage Detect (LVD) circuit. The LVD holds the
MCU in reset until applied voltage reaches an appropriate level. The LVD also protect against
under-voltage conditions. Consult the MC9S12XHY256 reference manual for details LVD
operation.
CLOCK
The DEMO9S12XHY256 applies an 8MHz crystal oscillator for timing input. User application
must configure the external timing input for proper operation.
Refer to the MC9S12XHY
Reference Manual for details on use and configuration of the external clock source.
COMMUNICATIONS
Communications options for the DEMO9S12XHY256 include serial RS-232, LIN bus, and CAN
bus. Serial RS-232 communications is supported through a RS-232 physical layer device
(PHY) and standard DB-9 connector, or through the integrated BDM.
A high-speed,
enhanced, LIN PHY provides LIN bus communications through a 2 x 2 Molex connector (pn
39-29-1048). A high-speed CAN PHY provides CAN bus communications through a 1 x 4
Molex connector (pn 39-30-3045).
The COM_SEL (JP3) option header connects the MCU SCI signal to either the LIN PHY or the
RS-232 PHY. See Figure 7 below for jumper position options.
10
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